| 摘要: |
| 针对航空发动机全权限数字电子控制(FADEC)系统中解算器信号处理电路存在精度低、温漂大、响应慢、判象困难等缺点，提出一种基于现场可编程门阵列(FPGA)的解算器处理技术，采用DDS激励、模拟积分器、象限判断器等实现信号的调制解调，采集误差不超过0.208‰，温漂不大于0.1‰，谐波干扰影响仅为0.03‰，响应速度达到两个周期以内，克服了激励和反馈相位差的影响，实现了四象限判断。 |
| 关键词: 航空发动机 全权限数字电子控制系统 解算器 调制解调 |
| DOI： |
| 分类号: |
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| A Resolver Technology for Full Authority Digital Electronic Control Systems of Aero-Engine |
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JIANG Wen-liang1,2,WANG Shao-yong2,YING XiaO2,HUANG Jin-quan1,3
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(1. Nanjing University of Aeronautics and Astronautics，Jiangsu Province Key Laboratory of Aerospace Power System，Nanjing 210016，China;2. AVIC Aeroengine Control System Institute，
Aviation Industry Corporation of China，Wuxi 214063，China;3. Collaborative Innovation Center of Advanced Aero-Engine，Beijing 100191，China)
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| Abstract: |
| According to the resolver signal processing circuit with the weakness of low accuracy，large temperature drift，slow response and difficulty of quadrant judgments in full authority digital electronic control (FADEC) system of aero-engine，a resolver technology of signal modulation-demodulation based on Field-Programmable Gate Array (FPGA) was presented by DDS excitation，analog integrator and quadrant judgment. The maximal acquisition error was less than 0.208‰，the error from temperature drift was not more than 0.1‰，and the influence of harmonic interference was only 0.03‰，the response speed was within two periods，in addition，the influence of the phase shift between the drive signal and the feedback signal was overcome by the technology. Meanwhile，it realized the judgment of four quadrants. |
| Key words: Aero-engines Full authority digital electronic control system Resolver Modulation-demodulation |
